This invention relates to systems for performing tests on integrated circuit test structures.
Integrated circuit research and development involves testing. In a typical scenario, test structures are fabricated on a wafer or other substrate using semiconductor manufacturing techniques. For example, test structures may be fabricated to permit characterization of the electrical properties of a thin film such as the thin film's resistivity. A relatively simple test structure may be formed by depositing a blanket film on a substrate. More elaborate test structures such as patterned traces and prototype electrical devices may also be formed.
Integrated circuit test structures that may be fabricated include blanket films, resistors, capacitors, transistors, memory cells, and serpentine traces. Test structures such as these may be characterized using test instruments such as voltmeters, voltage generators, capacitance meters, ellipsometers, function generators, lock-in amplifiers, etc. Measurements of various parameters such as current, voltage, resistance, capacitance, inductance, breakdown voltage, etc. can be made using these test instruments. A probe station may be used to make electrical contact with the appropriate test structures on a wafer during characterization measurements.
The characterization of test structures during research and development operations may make it possible to avoid potential design problems and thereby improve device performance in a final integrated circuit design. Testing may also be performed in a manufacturing environment.
Because of the large variety of measurement instruments that are used during testing, test measurement systems can become extremely complex. It can therefore be difficult to develop software that interfaces properly with various test instruments. Each instrument may be controlled using a different set of commands using potentially unique protocols. Moreover, instruments may be capable of measuring parameters over different ranges and may be connected to different probe stations. These complexities tend to make the process of characterizing test structures difficult to automate.
It would therefore be desirable to be able to provide improved ways of testing of test structures for integrated circuits.